8086 Programs
ALP to find average of two numbers (Click Here)
ALP to convert a given sixteen bit binary number to its gray equivalent (Click Here)
Write an ALP to SORT GIVEN SERIES IN ASCENDING ORDER (Click Here)
ALP Program for interfacing ADC with 8086 using 8255 (Click Here)
ALP Program for interfacing DAC with 8086 using 8255
a) For generating square wave form (Click Here)
a) For generating sawtooth wave form (Click Here)
a) For generating triangular wave form (Click Here)
Verilog Programs
Verolog Program for 8 to 3 priority encoder (Click Here)
Verolog Program for 8 to 3 without priority encoder (Click Here)
Verilog Program for Binary to Gray Code converter (Data_Flow) (Gate_Level) (Behavioral_Model)
Verilog Program for ALU (Click Here)
Verilog Program for 4-bit shift register (Click Here)
Verilog Program for a sequence detector (Click Here)
VHDL Programs
74x139 - 2 to 4 Decoder
Data Flow Model: (Using_simple_assignment_statement) (Using_when-else) (Using_with-select)
Structural Model: (Structural model)
Behavioral Model: (Using simple signal assignment statement) (Using if - else statement) (Using case statement)
74x138 - 3 to 8 Decoder
Data Flow Model: (Using_simple_assignment_statement) (Using_when-else) (Using_with-select)
Structural Model: (Structural model)
Behavioral Model: (Using simple signal assignment statement) (Using if - else statement) (Using case statement)
74x148 - 8 to 3 priority encoder
Behavioral Model: (Using if - else statement)
74x151 - 8 input 1 bit Multiplexer
Data Flow Model: (Using_simple_assignment_statement) (Using_when-else) (Using_with-select)
Structural Model: (Structural model)
Behavioral Model: (Using simple signal assignment statement) (Using if - else statement) (Using case statement)
Carry Look-Ahead Adder
Data Flow Model: (Using_simple_assignment_statement)
Structural Model: (Structural model)
Ripple Carry Adder
Structural Model: (Structural model)
256x8 - RAM
Behavioral Model: (Using if - else statement)
Realization of 4x1 Multiplexer using 2x1 Multiplexer
Block Diagram (Structural model)
Full Adder using Half Adder Block Diagram
Full Subtractor using Full Adder Block Diagram
Sequence Detector (101010) Block Diagram (VHDL_Program)
8x8 Multiplier Block Diagram
Barrel Shifter Block Diagram
ALP to add a series of numbers (8-bit) (Click Here)
ALP to add a series of numbers (16-bit) (Click Here)
ALP to add a series of numbers (16-bit) (Click Here)
ALP to find average of two numbers (Click Here)
ALP to convert a given sixteen bit binary number to its gray equivalent (Click Here)
ALP Program for interfacing ADC with 8086 using 8255 (Click Here)
ALP Program for interfacing DAC with 8086 using 8255
a) For generating square wave form (Click Here)
a) For generating sawtooth wave form (Click Here)
a) For generating triangular wave form (Click Here)
Verilog Programs
Verolog Program for 8 to 3 priority encoder (Click Here)
Verolog Program for 8 to 3 without priority encoder (Click Here)
Verilog Program for Binary to Gray Code converter (Data_Flow) (Gate_Level) (Behavioral_Model)
Verilog Program for ALU (Click Here)
Verilog Program for 4-bit shift register (Click Here)
Verilog Program for a sequence detector (Click Here)
VHDL Programs
74x139 - 2 to 4 Decoder
Data Flow Model: (Using_simple_assignment_statement) (Using_when-else) (Using_with-select)
Structural Model: (Structural model)
Behavioral Model: (Using simple signal assignment statement) (Using if - else statement) (Using case statement)
74x138 - 3 to 8 Decoder
Data Flow Model: (Using_simple_assignment_statement) (Using_when-else) (Using_with-select)
Structural Model: (Structural model)
Behavioral Model: (Using simple signal assignment statement) (Using if - else statement) (Using case statement)
74x148 - 8 to 3 priority encoder
Behavioral Model: (Using if - else statement)
74x151 - 8 input 1 bit Multiplexer
Data Flow Model: (Using_simple_assignment_statement) (Using_when-else) (Using_with-select)
Structural Model: (Structural model)
Behavioral Model: (Using simple signal assignment statement) (Using if - else statement) (Using case statement)
Carry Look-Ahead Adder
Data Flow Model: (Using_simple_assignment_statement)
Structural Model: (Structural model)
Ripple Carry Adder
Structural Model: (Structural model)
256x8 - RAM
Behavioral Model: (Using if - else statement)
Realization of 4x1 Multiplexer using 2x1 Multiplexer
Block Diagram (Structural model)
Full Adder using Half Adder Block Diagram
Full Subtractor using Full Adder Block Diagram
Sequence Detector (101010) Block Diagram (VHDL_Program)
8x8 Multiplier Block Diagram
Barrel Shifter Block Diagram
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