74x151 multiplexer using case statement

74x151 Behavioral model using case statement

library IEEE;

use IEEE.std_logic_1164.all;

entity mux74x151 is

                port(            EN_L:             in std_logic;

                        S:         in std_logic_vector(2 downto 0);

                        D:        in std_logic_vector(7 downto 0);

                        Y, Y_L: out std_logic);

end mux74x151;

architecture arch7 of mux74x151 is

begin

     process (EN_L, S, D)

     begin     

         case (EN_L&S) is

            when   "0000"     =>              Y <= D(0);      Y_L <= not D(0);

            when   "0001"     =>               Y <= D(1);      Y_L <= not D(1);

            when   "0010"     =>               Y <= D(2);      Y_L <= not D(2);

            when   "0011"      =>              Y <= D(3);      Y_L <= not D(3);

            when   "0100"     =>              Y <= D(4);      Y_L <= not D(4);

            when   "0101"      =>              Y <= D(5);      Y_L <= not D(5);

            when   "0110"      =>              Y <= D(6);      Y_L <= not D(6);

            when   "0111"       =>              Y <= D(7);      Y_L <= not D(7);

            when   others       =>              Y <= 'z';          Y_L <= 'z';

         end case;

     end process;

end arch7;